Arama Sonuçları Processor Architectures.

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1.

Cover image for Multicore Systems On-Chip: Practical Software/Hardware Design 2nd Edition

Multicore Systems On-Chip: Practical Software/Hardware Design 2nd Edition

Multicore Systems On-Chip: Practical Software/Hardware Design 2nd Edition

by

Ben Abdallah, Abderazek. author.

http://dx.doi.org/10.2991/978-94-91216-92-3

Format:

Electronic Resources

Alıntı:

Processor Architectures.

2.

Cover image for Molecular Computing Origins and Promises

Molecular Computing Origins and Promises

by

Rambidi, Nicholas G. author.

http://dx.doi.org/10.1007/978-3-211-99699-7

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Processor Architectures.

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3.

Cover image for Formal Specification Level Concepts, Methods, and Algorithms

Formal Specification Level Concepts, Methods, and Algorithms

by

Soeken, Mathias. author.

http://dx.doi.org/10.1007/978-3-319-08699-6

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Electronic Resources

Alıntı:

Processor Architectures.

4.

Cover image for Protecting Chips Against Hold Time Violations Due to Variability

Protecting Chips Against Hold Time Violations Due to Variability

by

Neuberger, Gustavo. author.

http://dx.doi.org/10.1007/978-94-007-2427-3

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Electronic Resources

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Processor Architectures.

5.

Cover image for Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures

Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures

by

Ogras, Umit Y. author.

http://dx.doi.org/10.1007/978-94-007-3958-1

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Processor Architectures.

6.

Cover image for Self-Organization in Embedded Real-Time Systems

Self-Organization in Embedded Real-Time Systems

by

Higuera-Toledano, M. Teresa. editor.

http://dx.doi.org/10.1007/978-1-4614-1969-3

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Processor Architectures.

7.

Cover image for Model-Driven Design Using IEC 61499 A Synchronous Approach for Embedded and Automation Systems

Model-Driven Design Using IEC 61499 A Synchronous Approach for Embedded and Automation Systems

by

Yoong, Li Hsien. author.

http://dx.doi.org/10.1007/978-3-319-10521-5

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Processor Architectures.

8.

Cover image for Autonomic Computing Enabled Cooperative Networked Design

Autonomic Computing Enabled Cooperative Networked Design

by

Wódczak, Michał. author.

http://dx.doi.org/10.1007/978-1-4939-0764-9

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Processor Architectures.

9.

Cover image for Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs

Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs

by

Noia, Brandon. author.

http://dx.doi.org/10.1007/978-3-319-02378-6

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Electronic Resources

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Processor Architectures.

10.

Cover image for Exploring Memory Hierarchy Design with Emerging Memory Technologies

Exploring Memory Hierarchy Design with Emerging Memory Technologies

by

Sun, Guangyu. author.

http://dx.doi.org/10.1007/978-3-319-00681-9

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Electronic Resources

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Processor Architectures.

11.

Cover image for Trace-Based Post-Silicon Validation for VLSI Circuits

Trace-Based Post-Silicon Validation for VLSI Circuits

by

Liu, Xiao. author.

http://dx.doi.org/10.1007/978-3-319-00533-1

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Processor Architectures.

12.

Cover image for VLSI Design and Test 17th International Symposium, VDAT 2013, Jaipur, India, July 27-30, 2013, Revised Selected Papers

VLSI Design and Test 17th International Symposium, VDAT 2013, Jaipur, India, July 27-30, 2013, Revised Selected Papers

by

Gaur, Manoj Singh. editor.

http://dx.doi.org/10.1007/978-3-642-42024-5

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Processor Architectures.

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